Computer Architecture Simulation & Visualisation

Snoopy Cache Coherence

In a bus-based multiprocessor system, cache coherence can be ensured using a snoopy protocol in which each processor's cache monitors the traffic on the bus and takes appropriate action when it sees an update to an address matching one that it holds.

This website contains a model demonstrating the Write Invalidate protocol. The description given here of this protocol is based on section 8.9 of Michael J. Flynn's book on "Computer Architecture" (ISBN 0-86720-204-1).

The files for the Write Invalidate protocol model can be downloaded from inv-cache.tar.gz. Instructions on how to use HASE models can be found at Downloading, Installing and Using HASE.