| Instruction | Description | Example | Result |
| LB | Load Byte | LB R3 1(R0) | Loads Byte from memory location 1 |
| LBU | Load Byte Unsigned | LBU R4 1(R0) | Loads Byte Unsigned from memory location 1 |
| SB | Store Byte | SB R1 1(R0) | Stores Byte in R1 into memory location 1 |
| LH | Load Halfword | LH R4 2(R0) |
Loads Halfword from memory location 2 into R4 |
| LHU | Load Halfword Unsigned | LHU R4 2(R0) | Loads Halfword Unsigned from memory location 2 into R4 |
| LUI | Load Upper Immediate | LUI R1 124 | Load 124 in the upper half of regester R1 |
| SH | Store Halfword | SH R5 6(R0) | Stores Halfword from R5 into memory loction 6 |
| LW | Load Word | LW R4 8(R0) | Loads Word from data memory loaction word 8 into R4 |
| SW | Store Word | SW R3 16(R0) | Stores Word in R3 into location 16 in data memory |
| LWC1 | Load Word to an FPR | LWC1 F0 0(R0) | Loads Word from data memory location word 0 into F0 |
| SWC1 | Store Word from FPR | SWC1 F1 8(RO) | Stores Word in F1 into location 8 in data memory |
| Instruction | Description | Example | Result |
| ADDI | Add Immediate Word | ADDI R1 R2 -4 | Store R2 + -4 in R1 |
| ADDIU | Add Immediate Unsigned Word | ADDIU R1 R2 16 | Store R2 + 16 in R1 |
| ADD | Add Word | ADD R1 R2 R3 | Store R2 + R3 in R1 |
| ADDU | Add Word Unsigned | ADD R1 R2 R3 | Store R2 + R3 in R1 |
| MULT | Multiply integers | MULT R1 R2 | Store R1 x R2 in HI register |
| MULTU | Multiply unsigned integers | MULTU R3 R4 | Store R3 x R4 in HI register |
| DIV | Divide integers | DIV R1 R2 | Store R1 / R2 in HI register |
| DIVU | Divide unsigned integer | DIVU R3 R4 | Store R3 / R4 in HI register |
| SUB | Subtract Word | SUB R1 R2 R3 | Store R2 - R3 in R1 |
| SUBU | Subtract Word Unsigned | SUB R1 R2 R3 | Store R2 - R3 in R1 |
| SLT | Set on less than | SLT R1 R2 R3 | If R2 is less than R3 set R1 to be 1 else set it to 0 |
| SLTI | Set on less than Immediate | SLTI R1 R2 5 | If R2 is less than 5 then set R1 to 1 else set it to 0 |
| SLTU | Set on less than Unsigned | SLTU R1 R2 R3 | If the unsigned value of R2 is less than the unsigned value R3 set R1 to 1 else set it to 0 |
| SLTIU | Set on less than Immediate Unsigned | SLTIU R1 R2 6 | If the R2 is less than 6 (after sign extension)set R1 to 1 else set it to 0 |
| Instruction | Description | Example | Result |
| AND | And | AND R1 R2 R3 | Stores result of R2 AND R3 into R1 |
| ANDI | And Immediate | ANDI R1 R1 19 | Stores the result of R1 AND 19 back into R1 |
| OR | Or | OR R1 R2 R3 | Stores result of R2 OR R3 into R1 |
| ORI | Or Immediate | ORI R1 R1 128 | Stores the result of R1 OR 128 back into R1 |
| XOR | Exclusive Or | XOR R1 R2 R3 | Stores result of R2 XOR R3 into R1 |
| XORI | Exclusive Or Immediate | XORI R1 R1 64 | Stores the result of R1 OR 64 back into R1 |
| NOR | Nor | NOR R1 R2 R3 | Stores result of R2 NOR R3 into R1 |
| SSL | Shift Word Left Logical | SSL R1 R2 4 | Shift R2 4 bits to the left and store in R1 |
| SRL | Shift Word Right Logical | SRL R1 R2 2 | Shift R2 2 bits to the right and store in R1 |
| SRA | Shift Word Right Arithmetic | SRA R3 R4 2 | Arithmetically shift R4 2 bits right and store in R3 |
| SLLV | Shift Word Left Logical Variable | SLLV R1 R2 R3 | Shift R2 left by R3 bits and store in R1 |
| SRLV | Shift Word Right Logical Variable | SRLV R1 R2 R3 | Shift R2 right by R3 bits and store in R1 |
| SRAV | Shift Word Right Arithmetic Variable | SRAV R1 R2 R3 | Shift R2 right arithmetically by R3 bits and store in R1 |
| Instruction | Description | Example | Result |
| BC1F | Branch on FP condition code false | BC1F loop | Branch to label 'loop' if FP code is false |
| BC1T | Branch on FP condition code true | BCT1 loop | Branch to label 'loop' if FP code is true |
| J | Jump | J 8 | Jump to instruction 8 |
| JR | Jump Register | J R1 | Jump to the instruction number held in R1 |
| Instruction | Description | Example | Result |
| BEQ | Branch on equal | BEQ R1 R2 4 | Branch forward 4 instructions if R1 and R2 are equal |
| BNE | Branch on not equal | BNE R1 R2 8 | Branch forward 8 instructions if R1 and R2 are not equal |
| BLEZ | Branch on less than or equal to zero | BLEZ R2 -2 | Branch back 2 instructions if R2 is less than or equal to zero |
| BGTZ | Branch on greater than zero | BGTZ R2 -2 | Branch back 2 instructions if R2 is greater than zero |
| BLTZ | Branch on less than zero | BLTZ R2 3 | Branch forward 3 instructions if R2 is less than zero |
| BGEZ | Branch on greater than or equal to zero | BGTZ R2 5 | Branch forward 5 instructions if R2 is greater than or equal to zero |
| Instruction | Description | Example | Result |
| BREAK | Breakpoint | BREAK | Halt |
| NOP | No Operation | NOP | No operation |
| Instruction | Description | Example | Result |
| MFHI | Copy the special purpose HI register to a GPR | MFHI R2 | Copies the HI register to R2 |
| MFLO | Copy the special purpose LO register to a GPR | MFLO R2 | Copies the LO register to R2 |
| MTHI | Copy a GPR to the special purpose HI register | MFHI R5 | Copies R5 to the HI register |
| MTLO | Copy a GPR to the special purpose LO register | MFLO R5 | Copies R5 to the LO register |
| MTC1 | Copy a word from a GPR to a FPU register | MTC1 R3 F2 | Copies R3 to F2 |
| MFC1 | Copy a word from a FPU register to a GPR | MFC1 R5 F3 | Copies F3 to R5 |
| MOVS | Copy a word between FPU registers | MOVS F1 F2 | Copies F2 to F1 |
| Instruction | Description | Example | Result |
| CVTWS | Convert a FP value to a 32-bit fixed-point value | CVTWS F0 F2 | The value in F2 is converted to a 32-bit word and stored in F0 |
| CVTSW | Convert a 32-bit fixed-point to a FP value | CVTSW F0 F1 | The value in F1 is converted to a FP value and stored in F0 |
| Instruction | Description | Example | Result |
| ABSS | Compute absolute value of an FP value | ABSS F2 F3 | Store absolute value of F3 in F2 |
| ADDS | Add FP values | ADDS F1 F2 F3 | Store F2 + F3 in F1 |
| NEGS | Negate an FP value | NEGS F1 F2 | The negated value of F2 is stored in F1 |
| SUBS | Subtract FP values | SUB F1 F2 F3 | Store F2 - F3 in F1 |
| MULS | Multiply FP values | MULS F1 F2 F3 | Store F2 x F3 in F1 |
| DIVS | Divide FP values | DIVS F1 F2 F3 | Store F2 / F3 in F1 |
| Instruction | Description | Example | Result |
| CFS | Set FP condition code false | CFS R1 R2 | Sets FP condition code false |
| CEQS | Set FP condition code on equal | CEQS R2 R3 | Sets FP condition code true if R2 is equal to R3 else set it false |
| COLTS | Set FP condition code on less than | COLTS R3 R4 | Sets FP condition code true if R3 is less than R4 else set it false |
| COLES | Set FP condition code on less than or equal to | COLES R4 R5 | Sets FP condition code true if R4 is less than or equal to R5 else set it false |