Ph.D. Project Opportunities
This page gives information about some Ph.D. project topics currently
proposed by potential supervisors in ICSA.
Projects in Self-Timed Systems Design and Testing, Computer Micro-architecture
I am interested in the interface between circuit design and computer architecture with a focus on self-timed or asynchronous circuits and systems. A sample of research topics suitable for PhD research in these areas.
For more detailed descriptions, please read this page and scroll down the list to find the above headings.
- Noise-Tolerant Asynchronous Circuits
- Micro-architectural Solutions for Fault-Tolerance
- Data-Dependent Processing for Energy-Aware Systems
- Top-down Testability for Self-Timed Circuits
- Delay Fault Testing of Self-Timed Circuits
Industrial CASE studentship available
Projects in Skeletal Parallel Programming
Supervisor: Murray Cole
skeletal approach to parallel programming advocates the
use of program forming constructs which abstract commonly
occuring patterns of parallel computation. In effect,
these constructs define a co-ordination language into
which fragments of lower level (either sequential or
explicitly parallel) code can be inserted.
There is a range of opportunities for developments in this area:
- Design, definition and implementation of a skeletal
extension to a "standard" imperative parallel framework
such as MPI.
- A similar investigation of the application of the skeletal
approach to a thread based parallel system such as Java.
- Investigation of the application of the skeletal approach to the programming of Grid (and other distributed) applications.
- Investigation of the application of
analysis to the compilation of skeletal parallel programs.
- Consideration and exploitation of the relationship between
the skeletal approach and the concept of
patterns as studied by Software Engineering researchers.
Projects in Optimisation and Compilation
Supervisor: Michael O'Boyle
The primary research question I am interested in is: how can compiler
technology best exploit the potential of high performance
architectures? This work involves developing new theory and optimisation
techniques and then prototyping these ideas in experimental compilers.
Compilers are one component in high performance computing and I am
interested in their interaction with other components, most notably
My research interests include:
Projects in Computer Architecture
I am interested in supervising research in any topic related to computer
architecture design. In particular, my main research topics currently are:
- Speculative Parallelisation for
I am interested in both hardware and software techniques for performing
speculative parallelisation in both small- and large-scale
I am also interested in compiler technology to support speculative
For more details, please consult the
- Cellular Multiprocessors
This new architectural approach is likely to replace current monolithic
superscalar microprocessors in the future. I am mainly interested in the
architectural and hardware issues involving this new approach. I am also
interested in some compiler and programming issues. For more details,
please consult the Cellular Multiprocessors project web page.
Projects in Computer Architecture
Supervisor: Nigel Topham
There is a strong synergy between computer architecture and
compilers - many architectural innovations rely upon increasingly
sophisticated optimizations, whereas optimizations such as
auto-parallelization and code generation for instruction-level
parallelism typically rely upon certain underlying hardware
structures. The research topics below address the general
question of how to exploit higher levels of integration
in the quest for increasing performance in future computing systems,
particularly embedded systems.
- Just-In-Time Codesign
Today there is an increasing bluring of the distinction between
hardware and software. The idea of codesign is to
simultaneously optimize both the software and hardware structures
for a given application, or class of applications. The concept of
just-in-time codesign extends this to real-time, iterative, or
even continuous compilation down to hardware and software. It relies
on the concept of flexible hardware and mobile intermediate
forms such as Java byte-code.
- Distributed on-chip memory architecture
A previous research project into
VLIW architecture showed how it is possible to partition applications across
a large number of function-unit clusters effectively. However, a major
fundamental unsolved problem, for all such partitioned architectures, is how to
provide adequate memory bandwidth. Multiple caches may be required, raising
issues such as cache coherence. This project aims to investigate this problem
with a combined compiler/architecture approach to maintaining a coherent but
distributed memory hierarchy within a single-chip implementation.
Projects in Software Tools for Embedded Systems
Supervisor: Bjoern Franke
Only about 2% of all microprocessors made drive PCs, the other 98% is embedded CPUs. However, unlike the PC domain there is no single processor architecture dominating the embedded domain. In fact, there is a large number of sometimes highly specialised processors for widely varying applications. Idiosyncratic architectures, specialised applications and the demand low cost, high performance solutions often operating under real-time constraints challenge traditional software tools, making it necessary to investigate new approaches in the area of tool support for embedded systems.
My main research interests are currently:
Projects in Networking
Supervisor: Mahesh Marina
My current research is mainly in the area of wireless and mobile networking, focusing on issues such as performance, reliability, self-configuration and heterogeneity. Sample topics include:
Brief descriptions for some of these topics are accessible via the School of Informatics website on research topics for prospective PhD students.
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