|
      
|
|
|
|
Advances in scalable, distributed shared memory (DSM) systems continue to create an increased need for bandwidth of shared memory accesses. A number of research on large-scale DSM implementations have shown that bandwidth loss due to data locality is significant. As DSM systems provide a shared address space on top of distributed memory, memory management activities at different system layers impact data locality. Techniques such as hidden pages, manager migration, prefetching, and double faulting have been shown improve overall performance by exploiting locality at memory page level. However, research on large-scale DSM systems showed that portability of the optimisation schemes is limited, and an efficient technique to analyse the impact of overheads caused by layered activities is unavailable. Therefore, advancing the development to a cost-effective direction requires a precise performance analysis and prediction technique.
This project aims to develop the analysis technique by simulating the behaviour of DSM systems to study the factors of performance loss and their interactions. A synchronised, discrete event simulation model of DSM nodes was developed using the construction environment provided by HASE. This talk will present the simulation mechanisms to support various aspects of the performance evaluation of memory system. These include: a cold-start memory analysis, an effect of multithreading context switch, an iterative experiment mode, and a hierarchical profiling scheme.
