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Institute for Computing Systems Architecture

Static Compiler Technique for Quantitive Analysis of Load Imbalance Overhead in Speculative Multithreading

Jialin Dou

While the exploration of instruction level parallelism is approaching its limit, there is still a substantially amount of parallelism "hidden" in thread level. Current parallelizing compilers aim at finding the parallelism. However, hindered by the unpredictability at compile time, they fail to parallelize most potential parallel program segments. Speculative Multithreading Chip-multiprocessor (SpMT-CMP) architecture could break this bottleneck by aggressively executing programs in parallel and checking dependency violations at run time. Though the overall performance is greatly improved by exposing more parallelism, partially, some speculative threads slow down the performance by imposing a large amount of speculation overheads.

This research project focuses on developing novel compiler techniques to automatically identify these "bad" speculative sections, so that thread level parallelism could be explored with speculation "selectively" to further improve the performance. Therefore, it is essential to quantify the amount of speculation overheads to turn off speculation if the speculation overheads pass certain thresholds.

Our study from previous research shows that the speculation overheads come from: speculative buffer overflow, dependence violation, load-imbalance, thread dispatch and commit overhead, and communication overhead.

This talk presents a technique that quantitatively computes load-imbalance between loop iterations. This estimation, combined with other overhead information, can be fed into an automatic speculative thread tracer to determine if a loop is feasible to be executed speculatively.


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