|
      
|
|
|
|
It is our belief that future Systems-on-Chip will be overwhelmingly programmable, consisting of soft-programmable forms - realised as instruction set architectures, and hard-programmable forms - realised as field programmable logic. This talk will outline new structures which integrate them both in a micronet-based asynchronous multithreaded architecture. A uniform programming model and a compilation environment for this architecture will be described and some preliminary results will be presented.
