Computer Architecture Simulation & Visualisation

Scoreboards

The first scoreboard was designed as part of the CDC 6600 as a means of controlling the flow of data between registers and multiple arithmetic units in the presence of inter-instruction dependencies such as Read-After-Write. Scoreboards are still used today in a variety of modern microprocessor, though most are less complex than that used in the CDC 6600. To illustrate the way scoreboards work, a HASE simulation model of the MIPS architecture with parallel function units and a scoreboard has been built and made accessible via the WWW using JavaHASE.

The HASE MIPS/Scoreboard website explains why Scoreboards are necessary and how the HASE MIPS model works.

The JavaHASE simulation applet for the MIPS can be accessed from the HASE MIPS/Scoreboard Website or can be downloaded directly:

• Download JavaHASE MIPS/Scoreboard applet

This MIPS applet is based on an earlier applet modelling the DLX architecture. The MIPS applet was built by David Dolman during tenure of a University of Edinburgh College of Science & Engineering Strachan Scholarship.