Computer Architecture Simulation & Visualisation

Evaluation of Multiprocessor Interconnection Networks

Project Summary

Designing multiprocessor systems is complicated because of the varied interactions between parallel software and hardware. Evaluating the impact of design decisions on overall performance is difficult. The EMIN project sought to address these issues by developing a software testbed for designing and analysing multiprocessor interconnection network performance. Rather than apply a single technique to the problem, a suite of design techniques has been used. The simplest (and often overlooked) technique is spreadsheet analysis. This enables quick broad brush comparisons of networks. Microbenchmarks are useful both for characterising network performance and for providing data which is relevant to software. Discrete event simulation is an extremely powerful technique for evaluating performance of complex interacting hardware/software systems; we have developed techniques based on both Java (the SimJava library) and C++ and threads (the HASE++ library). For a design tool to be effective, the turnaround time must be small and the results must be visible and understandable. Visualisation of simulation results is therefore crucial, so our models have had graphical representations from the start. The main contributions of this project have been:

• Parallel system simulations: we developed detailed cycle level simulation models of several parallel systems, including a packet switched crossbar and the Cray T3D. These were designed as a toolkit for exploring parallel system design, with all levels up to parallel software incorporated in the models.
• Workload characterisations and microbenchmarking: MPI and shared memory microbenchmarking routines have been made available. They provide a quantitative basis for comparing models, as well as having applications in parallel performance prediction.
• Multiprocessor testbed: We developed a testbed into which various workloads and system models can be plugged, with facilities for measuring detailed performance as well as large scale experimentation. We have used the testbed to measure, for example, the total time for variable numbers of processors and the same workload. The results show that for a bus the time grows linearly with the number of processors, for a crossbar the time is constant, and because of contention, a multistage network is slower for 4 processors than 8, 12 or 16. Measurements of average memory utilisation show that as the number of processors is increased, contention on a bus means that the memory units are not kept busy, whereas memory utilisation remains constant for the crossbar and multistage networks.
• Web based simulations: We designed, built and demonstrated the viability of SimJava as a simulation tool. SimJava is "The most complete discrete event simulation package on the web" (according to the US government research organisation MITRE). It is this aspect of the project which has attracted the most attention internationally. SimJava has been successfully applied to a number of other simulation projects around the world. It has been found to have many applications unforeseen at the start, in areas as diverse as manufacturing systems and distributed algorithms, by companies as diverse as Boeing and Toshiba, and universities from Princeton to Kwangwoon.

Publications

• R. McNab and F.W. Howell, "Using Java for Discrete Event Simulation", Proc. 12th UK Computer and Telecommunications Performance Engineering Workshop, Edinburgh, 1996.

• M. Grammatikakis, N. Fideropoulos, S. Liesche, T. Thielke, A. Zachos, F. Howell, "Network Simulation on the CM-5 by Sorting Integer Conflict Functions", in Proc. PARCO'97, September 1997, Bonn, Germany.

• F.W. Howell and R. McNab, "SimJava: a discrete event simulation library" in proc. SCS 1998 INTERNATIONAL CONFERENCE ON WEB-BASED MODELING AND SIMULATION, San Diego, January 1998.

• F.W. Howell & R.N. Ibbett, "Evaluation of Multiprocessor Interconnection Networks", Dept of Computer Science, University of Edinburgh. Technical Report CSG-38-98.

• F.W. Howell and R. McNab, SimJava: a discrete event simulation package for Java examples

• Fred Howell, "Approaches to parallel performance prediction" PhD Thesis, 1996, University of Edinburgh.

• F.W. Howell and R.N. Ibbett, STATE OF THE ART IN PERFORMANCE MODELLING AND SIMULATION Modelling and Simulation of Advanced Computer Systems: Techniques, Tools and Tutorials, edited by Kallol Bagchi, Chapter 1 : Hierarchical Architecture Simulation Environment, pages 1-18. Gordon and Breach, 1996.

• F.W. Howell, "Reverse Profiling", Software Engineering for Parallel and Distributed Systems : Proceedings of the First IFIP TC10 International Workshop on Parallel and Distributed Software Engineering, Chapman and Hall, 1996.

• P.S. Coe, F.W. Howell, R.N. Ibbett, R. McNab and L.M. Williams, "An Integrated Learning Support Environment for Computer Architecture", 3rd Annual Workshop on Computer Architecture Education at HPCA-3, Texas, 1997.

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