Computer Architecture Simulation & Visualisation

Scoreboards

The first scoreboard was designed as part of the CDC 6600 as a means of controlling the flow of data between registers and multiple arithmetic units in the presence of inter-instruction dependencies such as Read-After-Write. Scoreboards are still used today in a variety of modern microprocessor, though most are less complex than that used in the CDC 6600. Two HASE simulation models of architectures with parallel function units and a scoreboard have been built to illustrate the way scoreboards work, one based on the DLX, the other on the MIPS processor.

The HASE DLX/Scoreboard website explains why Scoreboards are necessary and how the HASE DLX model works. The files for the DLX/Scoreboard model can be downloaded from dlx-scb.tar.gz

The HASE MIPS/Scoreboard website explains why Scoreboards are necessary and how the HASE MIPS model works. The files for the MIPS/Scoreboard model can be downloaded from mips2.tar.gz

The MIPS model was built by David Dolman (based on the DLX model) during tenure of a University of Edinburgh College of Science & Engineering Strachan Scholarship.

Instructions on how to use HASE models can be found at Downloading, Installing and Using HASE.